diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 9a156bf..9e2a4d2 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -303,7 +303,7 @@
 
 #ifdef CONFIG_SYS_FSL_DDR4
 	/* tXP=max(4nCK, 6ns) */
-	int txp = max(mclk_ps * 4, 6000); /* unit=ps */
+	int txp = max((int)mclk_ps * 4, 6000); /* unit=ps */
 	trwt_mclk = 2;
 	twrt_mclk = 1;
 	act_pd_exit_mclk = picos_to_mclk(txp);
@@ -312,7 +312,7 @@
 	 * MRS_CYC = max(tMRD, tMOD)
 	 * tMRD = 8nCK, tMOD = max(24nCK, 15ns)
 	 */
-	tmrd_mclk = max(24, picos_to_mclk(15000));
+	tmrd_mclk = max(24U, picos_to_mclk(15000));
 #elif defined(CONFIG_SYS_FSL_DDR3)
 	unsigned int data_rate = get_ddr_freq(0);
 	int txp;
@@ -325,7 +325,7 @@
 	 * spec has not the tAXPD, we use
 	 * tAXPD=1, need design to confirm.
 	 */
-	txp = max(mclk_ps * 3, (mclk_ps > 1540 ? 7500 : 6000));
+	txp = max((int)mclk_ps * 3, (mclk_ps > 1540 ? 7500 : 6000));
 
 	tmrd_mclk = 4;
 	/* set the turnaround time */
@@ -511,8 +511,8 @@
 #ifdef CONFIG_SYS_FSL_DDR4
 	refrec_ctrl = picos_to_mclk(common_dimm->trfc1_ps) - 8;
 	wrrec_mclk = picos_to_mclk(common_dimm->twr_ps);
-	acttoact_mclk = max(picos_to_mclk(common_dimm->trrds_ps), 4);
-	wrtord_mclk = max(2, picos_to_mclk(2500));
+	acttoact_mclk = max(picos_to_mclk(common_dimm->trrds_ps), 4U);
+	wrtord_mclk = max(2U, picos_to_mclk(2500));
 	if ((wrrec_mclk < 1) || (wrrec_mclk > 24))
 		printf("Error: WRREC doesn't support %d clocks\n", wrrec_mclk);
 	else
@@ -627,14 +627,14 @@
 	wr_data_delay = popts->write_data_delay;
 #ifdef CONFIG_SYS_FSL_DDR4
 	cpo = 0;
-	cke_pls = max(3, picos_to_mclk(5000));
+	cke_pls = max(3U, picos_to_mclk(5000));
 #elif defined(CONFIG_SYS_FSL_DDR3)
 	/*
 	 * cke pulse = max(3nCK, 7.5ns) for DDR3-800
 	 *             max(3nCK, 5.625ns) for DDR3-1066, 1333
 	 *             max(3nCK, 5ns) for DDR3-1600, 1866, 2133
 	 */
-	cke_pls = max(3, picos_to_mclk(mclk_ps > 1870 ? 7500 :
+	cke_pls = max(3U, picos_to_mclk(mclk_ps > 1870 ? 7500 :
 				       (mclk_ps > 1245 ? 5625 : 5000)));
 #else
 	cke_pls = FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR;
@@ -1810,9 +1810,9 @@
 	unsigned int txpr, tcksre, tcksrx;
 	unsigned int cke_rst, cksre, cksrx, par_lat, cs_to_cmd;
 
-	txpr = max(5, picos_to_mclk(common_dimm->trfc1_ps + 10000));
-	tcksre = max(5, picos_to_mclk(10000));
-	tcksrx = max(5, picos_to_mclk(10000));
+	txpr = max(5U, picos_to_mclk(common_dimm->trfc1_ps + 10000));
+	tcksre = max(5U, picos_to_mclk(10000));
+	tcksrx = max(5U, picos_to_mclk(10000));
 	par_lat = 0;
 	cs_to_cmd = 0;
 
@@ -1877,7 +1877,7 @@
 	}
 
 	acttoact_bg = picos_to_mclk(common_dimm->trrdl_ps);
-	wrtord_bg = max(4, picos_to_mclk(7500));
+	wrtord_bg = max(4U, picos_to_mclk(7500));
 	if (popts->otf_burst_chop_en)
 		wrtord_bg += 2;
 
diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c
index 05a24dd..73db444 100644
--- a/drivers/ddr/fsl/lc_common_dimm_params.c
+++ b/drivers/ddr/fsl/lc_common_dimm_params.c
@@ -289,48 +289,58 @@
 		 * Find minimum tckmax_ps to find fastest slow speed,
 		 * i.e., this is the slowest the whole system can go.
 		 */
-		tckmax_ps = min(tckmax_ps, dimm_params[i].tckmax_ps);
+		tckmax_ps = min(tckmax_ps,
+				(unsigned int)dimm_params[i].tckmax_ps);
 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
-		taamin_ps = max(taamin_ps, dimm_params[i].taa_ps);
+		taamin_ps = max(taamin_ps,
+				(unsigned int)dimm_params[i].taa_ps);
 #endif
-		tckmin_x_ps = max(tckmin_x_ps, dimm_params[i].tckmin_x_ps);
-		trcd_ps = max(trcd_ps, dimm_params[i].trcd_ps);
-		trp_ps = max(trp_ps, dimm_params[i].trp_ps);
-		tras_ps = max(tras_ps, dimm_params[i].tras_ps);
+		tckmin_x_ps = max(tckmin_x_ps,
+				  (unsigned int)dimm_params[i].tckmin_x_ps);
+		trcd_ps = max(trcd_ps, (unsigned int)dimm_params[i].trcd_ps);
+		trp_ps = max(trp_ps, (unsigned int)dimm_params[i].trp_ps);
+		tras_ps = max(tras_ps, (unsigned int)dimm_params[i].tras_ps);
 #ifdef CONFIG_SYS_FSL_DDR4
-		trfc1_ps = max(trfc1_ps, dimm_params[i].trfc1_ps);
-		trfc2_ps = max(trfc2_ps, dimm_params[i].trfc2_ps);
-		trfc4_ps = max(trfc4_ps, dimm_params[i].trfc4_ps);
-		trrds_ps = max(trrds_ps, dimm_params[i].trrds_ps);
-		trrdl_ps = max(trrdl_ps, dimm_params[i].trrdl_ps);
-		tccdl_ps = max(tccdl_ps, dimm_params[i].tccdl_ps);
+		trfc1_ps = max(trfc1_ps,
+			       (unsigned int)dimm_params[i].trfc1_ps);
+		trfc2_ps = max(trfc2_ps,
+			       (unsigned int)dimm_params[i].trfc2_ps);
+		trfc4_ps = max(trfc4_ps,
+			       (unsigned int)dimm_params[i].trfc4_ps);
+		trrds_ps = max(trrds_ps,
+			       (unsigned int)dimm_params[i].trrds_ps);
+		trrdl_ps = max(trrdl_ps,
+			       (unsigned int)dimm_params[i].trrdl_ps);
+		tccdl_ps = max(tccdl_ps,
+			       (unsigned int)dimm_params[i].tccdl_ps);
 #else
-		twr_ps = max(twr_ps, dimm_params[i].twr_ps);
-		twtr_ps = max(twtr_ps, dimm_params[i].twtr_ps);
-		trfc_ps = max(trfc_ps, dimm_params[i].trfc_ps);
-		trrd_ps = max(trrd_ps, dimm_params[i].trrd_ps);
-		trtp_ps = max(trtp_ps, dimm_params[i].trtp_ps);
+		twr_ps = max(twr_ps, (unsigned int)dimm_params[i].twr_ps);
+		twtr_ps = max(twtr_ps, (unsigned int)dimm_params[i].twtr_ps);
+		trfc_ps = max(trfc_ps, (unsigned int)dimm_params[i].trfc_ps);
+		trrd_ps = max(trrd_ps, (unsigned int)dimm_params[i].trrd_ps);
+		trtp_ps = max(trtp_ps, (unsigned int)dimm_params[i].trtp_ps);
 #endif
-		trc_ps = max(trc_ps, dimm_params[i].trc_ps);
+		trc_ps = max(trc_ps, (unsigned int)dimm_params[i].trc_ps);
 #if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
-		tis_ps = max(tis_ps, dimm_params[i].tis_ps);
-		tih_ps = max(tih_ps, dimm_params[i].tih_ps);
-		tds_ps = max(tds_ps, dimm_params[i].tds_ps);
-		tdh_ps = max(tdh_ps, dimm_params[i].tdh_ps);
-		tqhs_ps = max(tqhs_ps, dimm_params[i].tqhs_ps);
+		tis_ps = max(tis_ps, (unsigned int)dimm_params[i].tis_ps);
+		tih_ps = max(tih_ps, (unsigned int)dimm_params[i].tih_ps);
+		tds_ps = max(tds_ps, (unsigned int)dimm_params[i].tds_ps);
+		tdh_ps = max(tdh_ps, (unsigned int)dimm_params[i].tdh_ps);
+		tqhs_ps = max(tqhs_ps, (unsigned int)dimm_params[i].tqhs_ps);
 		/*
 		 * Find maximum tdqsq_max_ps to find slowest.
 		 *
 		 * FIXME: is finding the slowest value the correct
 		 * strategy for this parameter?
 		 */
-		tdqsq_max_ps = max(tdqsq_max_ps, dimm_params[i].tdqsq_max_ps);
+		tdqsq_max_ps = max(tdqsq_max_ps,
+				   (unsigned int)dimm_params[i].tdqsq_max_ps);
 #endif
 		refresh_rate_ps = max(refresh_rate_ps,
-				      dimm_params[i].refresh_rate_ps);
+				      (unsigned int)dimm_params[i].refresh_rate_ps);
 		/* extended_op_srt is either 0 or 1, 0 having priority */
 		extended_op_srt = min(extended_op_srt,
-				      dimm_params[i].extended_op_srt);
+				      (unsigned int)dimm_params[i].extended_op_srt);
 	}
 
 	outpdimm->ndimms_present = number_of_dimms - temp1;
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c
index b43b669..6f291eb 100644
--- a/drivers/ddr/fsl/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -106,7 +106,8 @@
 		i2c_write(SPD_SPA1_ADDRESS, 0, 1, &dummy, 1);
 		ret = i2c_read(i2c_address, 0, 1,
 			       (uchar *)((ulong)spd + 256),
-			       min(256, sizeof(generic_spd_eeprom_t) - 256));
+			       min(256,
+				   (int)sizeof(generic_spd_eeprom_t) - 256));
 	}
 #else
 	ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,